In your new role you will:​

• To work closely with the implementation team to define the algorithm required for the Power IC ACDC topology ( Flyback, PFC, LLC, Fast Frequency(FF), QR )

• To translate the algorithm to firmware and to verify it.

• To debug and perform verification using system modeling and FPGA.

• To code the firmware to implement the algorithm and features.

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Requirements:​​

• Good knowledge in Power IC topologies.

• Experienced in defining and implementing algorithms for Power IC.

• Ability to code firmware in C/C++

• Familiar with tools compilers and debuggers.

• Good fundamentals in ACDC Power IC.

• Strong analytical and problem-solving skills.

• Proactive and self-starter.

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DISCLAIMER

The above information on this description has been designed to indicate the general nature, and level, of the work performed by this position. It is not designed to contain, or be interpreted, as a comprehensive inventory of all duties, responsibilities and qualifications required.

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We invite interested candidates to write-in with CV to Lee Shiow Chyn, EA 12C6130/ R1112042 semicon@hpspartners.com.sg 

 

We regret that only shortlisted candidates will be contacted for a discussion.