Wafer Backgrind Staff Engineer

HPS Partners is sourcing for a key contributor for an MNC in Singapore and invite interested applications to write in with CV to semicon@hpspartners.com.sg  

Location: Singapore



  • Principal focus of developing and transferring of new wafer finishing processes/technology which includes wafer bonding/ debonding, backgrinding, wafer dicing (stealth dicing, laser ablation, mechanical dicing, filamentation laser and other new dicing methods), wafer breaking, tape transfer, PnP, ULED mass transfer techniques etc of sapphire and silicon based wafers.

  • Actively drive process development, inclusive of process/product characterization, qualification and production pilot runs and volume ramp, through the matrix-management of a cross-functional team within the Singapore Operations, to achieve timely delivery of quality innovations and products to meet market and customer demands.

  • To introduce new products, processes and technologies within customer requirements, with the objective of ensuring process robustness and manufacturability, cost effectiveness and profitable yields, complete with post-release care.

  • Plan and perform experiments in collaboration with international design team, vendors, etc.

  • Establishing good process margins and inline controls including setting up SPC control chart as well as maintenance of Cp/Cpk performance

  • Perform routine reporting of project status as well as creating & updating of process documentations, i.e FMEA, Operating Instructions, Process Characterization Report, Control Plan, etc.

  • Yield analysis and lead trouble-shooting of defect and yield issues and process excursions associated with the new process/tools.


  • Bachelor's Degree in Electrical, Electronics, Mechanical, Chemical, Material, Physics or Chemistry Engineering

  • Minimum 3 years of experience in semiconductor environment , with direct experience in any/all of the following areas: technology transfer, process integration, yield engineering, unit/module process development, statistical process control.

  • SPC, DOE, FMEA, lean methodology, various analysis techniques, minitab , JMP

  • Knowledge on SPC, DOE, FMEA, lean methodology, various analysis techniques, minitab , JMP, basic LED functionality knowledge etc.


The above information on this description has been designed to indicate the general nature, and level, of the work performed by this position. It is not designed to contain, or be interpreted, as a comprehensive inventory of all duties, responsibilities and qualifications required.

We regret that only shortlisted candidates will be contacted for a discussion.

EA 12C6130 R1112042 

Lee Shiow Chyn