​Responsibilities

• Partner with the business unit and design team to develop interconnect and assembly  packaging technologies solutions from design, prototyping and product qualification to meet  technology and product roadmap. 

• Cross functional teams collaboration, engagement with research institutions, tool and  material suppliers in supporting product qualification, innovate interconnect / packaging  materials solution to enhance product reliability and performance. 

• Establish robust process margins, inline SPC controls with good Cp/Cpk performance. • Provide documentation (characterization reports, operating instructions, control plan, etc) &  regular technical reporting and coordinate internally and externally to fulfil the Technology and  Product Development programs. 

• Perform analysis on process performance, yield, establish design rules, manufacturing cost  and cycle-time. 

• Contribute in planning and execution of essential continuous improvement program and  ensure implementation of effective correction action. 

• Serve as a technical team and act as a subject matter expert.

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Requirements​

• PhD / Master in Material Science, Polymer Science, Physics or Electrical Engineering with  at least 5-10 years of experience with direct technical background in semiconductor interconnect assembly & packaging. 

• Prior work experience in new product and/or new process development and qualification.

• Interconnect assembly knowledge with hands-on experience in Flip Chip bonding - C2C, C2W  assembly, pick and place, underfill / moulding compounds, and CAD drawing or equivalent. Knowledge with hands-on experience in laser debonding, dicing and thin submount substrate,  wafer reconstitution handling will be an added advantage. 

• Advance semiconductor wafer level packaging assembly, wirebond and fan-in/fan-out will be  a big plus. 

• Knowledge of production and automation equipment, processes, designs and functions. Self-driven, strong team player with ability to work independently, excellent communication and problem-solving skills. 

• Passionate R&D with an optimistic mindset.

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DISCLAIMER

The above information on this description has been designed to indicate the general nature, and level, of the work performed by this position. It is not designed to contain, or be interpreted, as a comprehensive inventory of all duties, responsibilities and qualifications required.

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We invite interested candidates to write-in with CV to Lee Shiow Chyn, EA 12C6130/ R1112042 semicon@hpspartners.com.sg 

 

We regret that only shortlisted candidates will be contacted for a discussion.