• Be part of the technical leadership for Chip Verification in a multi-site organization

• Drive together with Chip Verification Architect on defining verification strategy (Constrained random, Formal, Directed) for Chip/System-level verification

• Implement the next generation of verification environment architecture and methodology development

• Drive topics forward together working with various internal and external experts (e.g. application, analog/digital/mixed-signal, software, patterns) as well as management

• Actively participating and contributing in cross-functional collaboration with design, software and hardware teams across multiple design sites, to ensure a successful product delivery

• Ensure verification for the Chip/System from product requirements, test plan, test cases development and driving functional and code coverage closure

• Own and create technical documentation in order to provide documents to guarantee the ISO26262 and ISO21434 compliance

• Represent technical competence in Chip Verification and act as a technical leader by actively sharing your knowledge

• Work closely together with Infineon representatives of standardization committees for automotive standards

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Requirements:

• Masters/Bachelors in Electrical/Electronic Engineering with 12+ years of relevant work experience in highly complex Chip Development.

• Strong foundational knowledge of digital design & verification.

• Advanced knowledge and hands-on experience of System Verilog and UVM.

• Hands-on experience in hardware-software debugging at the system or application level.

• Hands-on experience with C-based tests development and debugging.

• Experience in Network on Chip (NOC), AMBA, AHB/AXI and ARM is a plus.

• Experience in low power and high-performance computing are preferred

• Firmware/software experience is advantageous.

• RTL design and synthesis experience is advantageous.

• Experience in the automotive industry in functional safety and cybersecurity is a plus.

• Details oriented with excellent written and verbal skills are required.

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DISCLAIMER

The above information on this description has been designed to indicate the general nature, and level, of the work performed by this position. It is not designed to contain, or be interpreted, as a comprehensive inventory of all duties, responsibilities and qualifications required.

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We invite interested candidates to write-in with CV to Lee Shiow Chyn, EA 12C6130/ R1112042 semicon@hpspartners.com.sg 

 

We regret that only shortlisted candidates will be contacted for a discussion.