Staff/Snr Staff Engineer - SoC Functional Verification (Radar)

​Responsibilities:

  • Execute SoC verification tasks and work closely with team members to review and understand the relevant functional and safety-related requirements.

  • Write verification plans to meet these requirements after close alignment with other verification teams for proper work split according to mutually acceptable verification assignment.

  • Execute the verification plan by developing C/C++ test cases and SystemVerilog/UVM testbench components and by integrating 3rd party VIP components.

  • Simulate and debug at RTL, Unit Delay, and Gate Level using appropriate tools and flows including Emulator, Portable Stimulus, or Formal methodologies for functional and toggle coverage closure.

Requirements:

  • Masters/Bachelors in Electrical Engineering or Computer Science with minimum 5 years of relevant work experience.

  • Strong foundational knowledge of digital design & verification.

  • Advanced knowledge and hands-on experience of SystemVerilog and UVM.

  • Hands-on experience in hardware-software debugging at the system or application level. Hand-on experience with gate-level-simulations and with debugging/troubleshooting skills

  • Candidate must have Radar Signal Pre and Post Processing modules (SPU, RIF, RDMA, RMEM) design and verification knowledge.

  • Verification experience of Preprocessors like PPU or general CPU peripherals is a plus.

  • Exposure to version-controlling (eg, Git/Bitbucket, Clearcase, CVS, SVN) and bug-management schemes like JIRA.

  • Dynamic and energetic with a zero verification escape mindset.

  • Self-motivated, flexible, good communication with interpersonal skills and is a good team player who is able to work well with both internal and external partners.

  • Candidate has proven ability to achieve results in a very dynamic, multi-site environment and be able to coordinate with priorities and self-initiatives

  • Experience in the automotive industry in functional safety and cybersecurity are advantageous.

  • Candidate who has more relevant working experience will be considered for a more senior position.

DISCLAIMER

The above information on this description has been designed to indicate the general nature, and level, of the work performed by this position. It is not designed to contain, or be interpreted, as a comprehensive inventory of all duties, responsibilities and qualifications required.

We invite interested candidates to write-in with CV to Lee Shiow Chyn, EA 12C6130/ R1112042 semicon@hpspartners.com.sg 

 

We regret that only shortlisted candidates will be contacted for a discussion.