Staff Engineer/Senior Staff/Principal Engineer - Analog Mixed Signal Design For Test

  • Main contributor in defining test solution for mixed signal analog design IPs.

  • Perform feasibility of test concept, design/implementation and finally to the validation of the test solution in silicon.

  • Work with design, SoC implementation and DFT teams across all sites of Infineon to formulate analog/mixed signal test solution.

  • Provide and implement test solutions that are based on the current Infineon Mixed signal DFT Implementation flow.

  • Working with counterparts in other sites to jointly execute projects as an integral part of the team in global environment.

  • Be the driver of change and innovation to develop of state of art analog mixed signal DFT methodologies.

  • Continuously drive improvements in implementation methodology to bring them to deployment.

  • Help, assist and resolve day-to-day & complex technical issues faced in the team.

  • Self-driven and able to work cooperatively with team members to achieve project targets.

  • Formulate verification test plan and to perform analog defect simulation to ensure that sufficient coverage is attained.

Requirements:

  • Bachelor/Master degree in electrical/electronics engineering or equivalent with minimum of 6 -10 years of relevant work experience in analog mixed-signal design.

  • Good knowledge in mixed-signal designs such in bandgap, amplifier, both linear and switched regulator, ADC / DAC and Oscillators.

  • Proficient in VHDL/System Verilog coding with experience in digital design/functional simulation will be advantageous.

  • Good DFT debugging skills and have relevant experience in formuating /defining mixed signal block test solutions and working with test engineering on ATE (e.g. J750) silicon bringup debug & post silicon analysis.

  • Good knowledge in design of test and design for common analog/mixed signal IPS as in ADC/DAC/PLL/PMU blocks to cater for manufacturing requirements.

  • Innovative and eager to challenge the status quo to derive new solutions that are more superior in performance.

  • Good team player, proficient in English and communication skills.

  • Familiar with Cadence analog design tools and simulators

DISCLAIMER

The above information on this description has been designed to indicate the general nature, and level, of the work performed by this position. It is not designed to contain, or be interpreted, as a comprehensive inventory of all duties, responsibilities and qualifications required.

We invite interested candidates to write-in with CV to Lee Shiow Chyn, EA 12C6130/ R1112042 semicon@hpspartners.com.sg 

We regret that only shortlisted candidates will be contacted for a discussion.